JFET Idss Matching

By | January 25, 2015

Idss for the 2SK596s JFET – as introduced in my previous blog – is an order of magnitude lower than (say) a 2N5457, so I have been revisiting the design of my Arduino-based automatic JFET matcher to be sure that I can use it to characterise the 2SK596s with good resolution. Along the way, I was idly comparing readings between my automated tester and the new JFET Matcher project (kits available here) and noticed that whilst the Vgs readings between the two testers were comparable, the automatic tester  consistently showed a lower Idss than the new manual tester (by about 3%). I went right through the hardware design of both testers (and and the firmware for the auto tester) looking for a bug or any clue to the discrepancy. Eventually (doh!), it dawned on me that the reason the two testers give different results is that Idss is dependant on the drain-source Voltage Vds.

In this case, the 3% difference is due to the fact that the automated matcher operates at a drain-source voltage of nominally 5V, whereas the manual matcher is operating off a 9V battery.

So, I made the world’s simplest Idss tester…


…and measured the Idss for a single sample PF5102 JFET over a Vds range of 2-25V. The results:

166SVThe low value (2V) is 3.84 mA and the high value (25V) is 4.51 mA. This is a 15% change and entirely explains the discrepancy between the automated and manual matchers.

So the moral is:  if you want an Idss of a particular value (for example if you’re using your JFET as a constant current source or sink), then you need to test for Idss at the same Vds as your application circuit.

Incidentally, I also noticed that Vgs(10M) measurements are susceptible to RF interference. If you are getting inconsistent results, you should go and do your JFET-testing/matching away from potential sources of interference.  If you set your tester for Vgs(M) and the reading on your multimeter changes as you move your hand close to the JFET, you have a problem with interference.  svfavicon.png

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